DDR5 SO-DIMM
DDR5 DRAM specification has significant improvements in capacity, speed and voltage. The SPD is programmed to JEDEC standard latency DDR5-4800 timing of 40-39-39 at 1.1V. Each 262-pin SO-DIMM uses gold contact fingers, and are available in 8GB, 16GB and 32GB capacities. Power management integrated circuit (PMIC) provides better signal integrity and more stable power. Original DRAM chips and all components are stringently tested for the highest level of compatibility, reliability, and performance.
| Model No. | IC Organization | Speed (MT/s) | Density | Voltage | Download |
|---|---|---|---|---|---|
|
CIR-S5SUSC4808G
|
1Gx16 | 4800MHz | 8GB | 1.1V | 0.49 MB |
|
CIR-S5SUSB4816G
|
2Gx8 | 4800MHz | 16GB | 1.1V | 0.49 MB |
|
CIR-S5SUSB4832G
|
2Gx8 | 4800MHz | 32GB | 1.1V | 0.50 MB |
|
CIR-S5SUSE5608G
|
1Gx16 | 5600MHz | 8GB | 1.1V | 0.47 MB |
|
CIR-S5SUSF5616G
|
2Gx8 | 5600MHz | 16GB | 1.1V | 0.47 MB |
|
CIR-S5SUSF5632G
|
2Gx8 | 5600MHz | 32GB | 1.1V | 0.47 MB |
